Components - CPU Registers
π§ CPU Registers β Types, Roles, and Addressing Modes (Developer Guide)
A practical overview of CPU registers, what they store, and how they support instruction execution, memory access, and addressing.
1οΈβ£ What Is a Register?
A register is a small, ultra-fast storage location inside the CPU.
Registers store:
- Instructions
- Memory addresses
- Operands (data)
- Execution state
π Registers are much faster than cache or RAM and are essential for performance.
2οΈβ£ Core CPU Registers
π¦ Program Counter (PC)
Holds the address of the next instruction to fetch.
- Automatically updated after each instruction
- Changed by jumps, calls, interrupts
π¦ Memory Address Register (MAR)
Stores the memory address being accessed.
Used when:
- Reading from memory
- Writing to memory
π¦ Memory Buffer Register (MBR / MDR)
Stores data being transferred between CPU and memory.
- Can hold instructions or data
- Temporary transfer buffer
π¦ Instruction Register (IR)
Holds the current instruction being decoded or executed.
π¦ Flag Register (Status Register)
Stores execution state and arithmetic results.
Common flags:
- Zero (Z)
- Carry (C)
- Overflow (V)
- Sign (S)
- Parity (P)
- Interrupt Enable
- Privilege Mode
π¦ General-Purpose Registers (GPRs)
Used to store temporary values and operands.
Examples:
- x86:
RAX,RBX,RCX,RDX - ARM:
X0βX30
π¦ Stack Pointer (SP)
Points to the top of the stack.
Used for:
- Function calls
- Local variables
- Return addresses
Stack Addressing Mode
The stack pointer enables stack-based addressing:
1
2
PUSH value β SP moves
POP value β SP moves
π¦ Base Register (BR)
Stores a base address used for effective address calculation.
Used to access:
- Arrays
- Structures
- Memory segments
3οΈβ£ Addressing Modes Using Registers
Addressing modes determine how effective memory addresses are calculated.
πΉ Displacement Addressing
1
Effective Address = Register + Offset
Used for structured data and arrays.
πΉ Relative Addressing
1
Effective Address = PC + Offset
Used for:
- Branches
- Loops
- Position-independent code
πΉ Base Register Addressing
1
Effective Address = Base Register + Offset
Used in:
- Stack frames
- Dynamic memory access
πΉ Stack Addressing
1
Effective Address = SP + Offset
Used for:
- Function calls
- Temporary storage
4οΈβ£ Why Registers Matter for Performance
β Reduce memory access
β Speed up arithmetic operations
β Enable fast function calls
β Support efficient addressing
More register usage = fewer RAM accesses = faster execution
5οΈβ£ Registers in Real CPU Architectures
x86-64
RAX,RBX,RCX,RDXRSP(Stack Pointer)RIP(Program Counter)RFLAGS
ARM64
X0βX30SP,PC,PSTATE
6οΈβ£ Developer Takeaways
β Registers are the fastest storage in the CPU
β PC controls execution flow
β SP manages function call stacks
β Base registers enable flexible memory access
β Effective addressing reduces instruction complexity
π§© One-Line Mental Model
Registers are the CPUβs working memory for executing instructions efficiently.